SysMoore is a descriptive term for state-of-the-art integrated circuit design, which combines the scale complexity of Moore’s law with the systemic complexity of hyper-convergent integration.
Moore’s law isn’t really a law in the legal sense or even a proven theory in the scientific sense (such as E = mc2). Rather, it was an observation by the late Gordon Moore in 1965 while he was working at Fairchild Semiconductor: the number of transistors on a microchip (as they were called in 1965) doubled about every year.
Moore went on to co-found Intel Corporation and his observation became the driving force behind the semiconductor technology revolution. Over time, since this was based on observations of real events, the doubling interval evolved, up to two years and then down to about 18 months. However, the exponential nature of Moore’s law continued, creating decades of significant opportunity for the semiconductor industry.
Due to the nature of semiconductor manufacturing, moving an existing design to the newest process would yield a denser chip, which reduced cost. It also delivered lower power consumption and higher performance thanks to the smaller transistors. So, riding the Moore’s law curve had significant commercial benefits. Many companies did that and became very successful.
Over the past decade or so, semiconductor process technology has become very complex. Transistors are now three-dimensional devices that exhibit counter-intuitive behaviors. The extremely small feature size of advanced process technologies has required multiple exposures (multi-patterning) to accurately reproduce these features on a silicon wafer. This has added substantial complexity to the design process.
All this complexity has essentially “slowed down” Moore’s law. Moving to a new process node is still an option, but the extreme complexity and cost of doing so has slowed the pace of migration. Furthermore, each new process node is now delivering less dramatic results in terms of density, performance, and power reduction. The evolution of semiconductor process technology is reaching molecular limits, and this is slowing the exponential benefits of Moore’s law.
The semiconductor and electronic design automation (EDA) industries are full of innovation and creativity. The exponential technology curve needed to fuel continued innovation and growth cannot and will not be stopped.
In this new setting of a slowing Moore’s law, the industry is now innovating in other ways. Examples include new architectures such as parallel algorithms and new approaches to computation, often assisted by artificial intelligence (AI) techniques.
At the hardware level, something fundamental is happening as well. The huge, single-chip approach to design is starting to be replaced with multiple pieces of silicon, each with a specific purpose and all integrated in one package using new and very dense integration techniques.
This integration technique is referred to as 2.5D or 3D design. It forms the basis for a new way to build complex system-on-chip, or SoC, designs. Rather than one large, monolithic chip containing the system, a collection of smaller chips, including chiplets and dense memory stacks, now contain the system and all of these devices are integrated into one sophisticated package, giving rise to system-in-package, or SiP, design.
For many years, scale complexity drove the semiconductor industry’s exponential technology growth, thanks to trends made famous by Moore’s law. When the ability to scale a single chip began to slow, the industry found other methods of innovation to maintain this exponential growth. These new methods examined the requirements of the complete system with the goal of integration at this level.
This new design trend is driven by systemic complexity and it aims to maintain exponential technology growth through other means. Some aspects of this new approach to design have been dubbed “more than Moore.” This term refers primarily to 2.5D and 3D integration techniques.
The complete landscape is far bigger and presents the opportunity for higher impact, however. At the 2021 worldwide Synopsys Users Group, called SNUG World, the chairman and co-CEO of Synopsys, Aart de Geus, presented a keynote address. In his presentation, Dr. de Geus observed that Moore’s law is now blending with new innovations that leverage systemic complexity. He coined the term SysMoore as a shorthand way to describe this new design paradigm.
These trends and resultant terminology are summarized below. The SysMoore era will fuel semiconductor innovation for the foreseeable future. With it comes a wide range of design challenges that must be addressed.
The demands of design in the SysMoore era are substantial. The convergence of multiple technologies in one sophisticated package requires a holistic analysis of the entire system. Previous methods that analyze each part of the system independently simply will not work in the SysMoore era. What is required is a hyper-convergent design flow that integrates best-in-class technology to deliver a unified analysis of the entire system.
Synopsys offers a growing set of integrated products that address the challenges of hyper-convergent design in the SysMoore era. Examples include:
