Pervasive Intelligence uses machine learning (ML) to improve each step of the chip development process. For example, a simulator uses AI/ML to generate more of the constrained-random stimulus that has been most effective at improving coverage results and therefore verification effectiveness. In the implementation domain, a logic synthesis or layout tool both explores the design space more rapidly and uses AI/ML to generate results observed to produce the best performance, area, and power (PPA).
Individual tools working on individual designs are valuable, but the full benefits of Pervasive Intelligence require two additional capabilities. First, tools must be able to “warm start” using results from previous designs on the same project. For example, after one block has been optimized and completed, its knowledge database can be leveraged by implementation tools for a second block in the same chip since the target technology is identical and design style is similar. Further, learnings from one project can often be applied to derivative projects.
Collaboration between EDA tools is the other essential ability. Via a shared knowledge database, learnings can be passed both forward and backward in the chip development flow. For example, a layout-aware logic synthesis tool can be much more effective if it has access to the results from the layout for previous runs of a block or other blocks in the same design. Similarly, implementation and optimization tools benefit from the analysis performed on actual chips in a wide range of field deployment scenarios.