Synopsys offers parasitic extraction solutions for both digital and custom design environments:
StarRC™ solution is the EDA industry’s gold standard for parasitic extraction. A key component of Synopsys Design Platform, it provides a silicon accurate and high-performance extraction solution for SoC, custom digital, analog/mixed-signal. memory IC and 3DIC designs. StarRC offers modeling of physical effects for advanced process technologies, including FinFET technologies at 16 nm, 14 nm, 10 nm, 7 nm, 5 nm and beyond. Its seamless integration with industry standard digital and custom implementation systems, timing, signal integrity, power, physical verification and circuit simulation flows along with debugging capability delivers unmatched ease-of-use and productivity to speed design closure and signoff verification. StarRC comes with in-built field solver Rapid3D™, which can serve as a reference or provide higher accuracy measurements. 2.5D and 3D-IC extraction is also supported by StarRC.
QuickCap NX is the golden extraction reference tool based on high accuracy 3D Field Solver which is well suited for advanced 14nm FinFET and beyond process technologies. Embedded 3D device visualizer makes it ideal for process exploration. High accuracy extraction, reference tool to rule based extractor, standard cell characterization, memory cell characterization and enhancing PDK quality are some of the key applications served by QuickCap NX.
Raphael is the gold standard, 2D and 3D resistance, capacitance and inductance extraction tool for optimizing on-chip parasitic for multi-level interconnect structures in small cells. As a reference field solver, Raphael provides the most accurate parasitic models in the industry. Trusted by major foundries, interconnect parasitics generated by Raphael are included as part of their design reference guide.
