Model-based design first and foremost requires “models.” Synopsys SaberRD and SaberEXP simulation products provide ASMLs that enable a design engineer to get from point to point in their simulation objectives. These libraries span a range of mixed technologies to permit assembly of the physical plant, system to be controlled, and the feedback elements. Modeling tools that permit specialized component device characterization or custom model development, as well as HDLs, can empower engineers to cross the model vacancy chasm. This helps users solve their modeling problems, increasing the efficiency within Synopsys tool usage for library development by making it easier to:
- Characterize component models (BJTs, MOSFETs, IGBTS, diodes, batteries, etc.)
- Verify/validate existing models
- Create new models
- Investigate limitations, boundary conditions
- Reduce the gap between top-down and bottom-up design methods
- Run high-level to detailed embedded code against virtual hardware
Providing a wide-ranging and automatic set of analyses to ensure the robustness of designs, SaberRD and SaberEXP help designers realize the substantial benefits that can arise out of early yield, stress, and fault analyses. These tools enable critical parts of a system to be identified, including components that are overloaded or those that are likely to adversely impact performance the most.
The "virtual manufacture" techniques of model-based design are not only extremely effective in revealing potential problems of yield caused by tolerance problems but can also achieve significant cost savings by identifying those components for which tight tolerance specification is not an issue so that expensive, narrower tolerance components are designed in only where their use is critical.
ECU emulators such as Synopsys Silver and Virtualizer™ enable genuine software testing to identify and resolve software bugs early in the design cycle, before hardware exists or is finalized, or as part of a software update and verification in a reused design platform.