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DesignWare IP for Wearable Fitness & Health Applications
Overview
Wearable devices are expected to dramatically improve the way we interact with our environment and manage our personal health and wellness. Accurate, efficient and innovative sensing is fundamental to ensuring these devices provide essential information and actions. Examples include sleep patterns, distance travelled, heart rate, blood glucose, oxygen content, blood pressure, and a myriad of things that may have not been thought of yet.
The SoCs that drives these wearable applications require robust IP solutions that deliver small form factors as well as performance efficiency.
Mouse over or tap to learn more about DesignWare IP Solutions:
Security
- Cryptographic cores, public key accelerators, TRNG
- Security protocol accelerators and co-processors
- Embedded security IP modules establish secure hardware Root of Trust environments
- Secure boot and cryptography middleware
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I3C
- Compliant with the latest MIPI I3C specification
- Backward compatible with the I2C target devices
- Supports all data rates up to 26.7 Mbps
- In-band interrupts within the 2-wire interface
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Data Fusion Subsystem
- ARC EMxD for battery-operated devices requiring RISC & DSP processing
- Data Fusion Subsystem for sensor fusion & always-on audio, voice, image processing
- Support for tightly coupled digital and analog sensors
- Support for tightly coupled multi-time programmable NVM
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EEPROM
- EEPROM Operation from single core voltage supply
- >10,000 write cycle endurance
- Integrated Error Checking and Correction (ECC) functionality
- Used to store user configuration, calibration and security data
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SRAM
- High-density low leakage memory w/power reduction modes
- Ultra low voltage operation
- Deep sleep mode reduces leakage by 70%
- Long channel devices reduce active leakage
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ROM
- Ultra low power anti-signature ROM
- Reduces leakage by up to 20%
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Bluetooth Low Energy
- Link Layer and PHY
- Operates below one volt supply
- Integrated security functions
- Supports the latest Bluetooth low energy standard
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Logic Libraries
- Thick oxide “always-on” libraries for static power savings
- Multi-bit flops for dynamic power and area savings
- Power Optimization Kit minimizes core leakage
- Ultra low voltage operation (40% below Vddnom)
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AMBA
- Compatible with AMBA 2.0, AMBA 3 AXI, AMBA 4 AXI and ACE-Lite
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Highlights:
- Thick oxide "always-on" logic libraries provide the lowest leakage for always-on wakeup circuits during sleep states.
- Ultra High Density logic libraries provide low voltage support down to 60% VddNom
- Multi-bit flops minimize clock loading, area and leakage, improving dynamic and static power
- Power Optimization Kits (POKs) for DesignWare Logic Libraries enable power consumption minimization while sustaining optimal performance
- Memory compilers with advanced power management features reduce leakage by up to 70%, controlled via a single pin with 0.9V operation
- Ultra-low power anti-signature via ROM reduces leakage up to 20%
- Sensor and Control IP Subsystem provides significant area savings with lower latency due to tightly coupled memory and sensor interface peripherals as well as hardware accelerators to improve performance & reduce code size
- ADC with up to 14-bit resolution and 5 Msps conversion rates exceed leading on-chip implementations
- Power & area efficient ARC EM processors with configurable and extensible architecture. Ideal for deeply embedded applications including functions such as voice and sensor fusion
- Compact Bluetooth low energy Link Layer and PHYs enable secure wireless connectivity with extended reach, and low power consumption for extended battery life targeting wearables and smart home applications
- Security IP including Public Key Accelerators, True Random Number Generators and security protocol accelerators and secure hardware root of trust protects against evolving threats
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