Synopsys' Verification Reference Methodology Cookbook for Bluespec RISC-V Processors

This document contains the details for the recommended verification methodology for Bluespec RISC-V processors, featuring Bluespec processor RV32I.MCU.AXI4.DM. 

The document can also be used as a base methodology to verify any of Bluespec RISC-V Processors using VCS.

What does the cookbook include?

• Verification reference methodology based on verification of Bluespec’s RISC-V MCU designed to run RISC-V assembly level programs on the core
• Google Open-Source UVM based constraint random instruction generator to generate valid instruction sequences to be applied to the DUT
• Basic bring up tests (example: blinky_print) to pipe-clean the installation of the core and tools

Please note: Someone from the Synopsys team will be contacting you with instruction on how to receive additional relevant material.