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Foundation IP: Embedded Memories, Logic Libraries, IO & PVT Sensors
Overview
Synopsys offers high-quality foundation IP for SoC designers, including memory compilers, non-volatile memory (NVM), logic libraries, and IO solutions. These solutions have been extensively proven in silicon with billions of units shipping in volume production. They help reduce project risk and speed up time-to-market for consumer, mobile, data center, and HPC applications requiring high speed, low leakage, and low power.
Synopsys Embedded Memory IP includes a broad range of high-speed, high-density, and ultra-high-density memory compilers and specialty memories—eMRAMs, TCAMs, and multi-port memories. It also includes a complete standard cell library supporting multiple architectures, voltage thresholds (VTs), gate biases, and PVTs.
The Synopsys High-Performance Core (HPC) Design Kit contains a suite of high-speed and high-density memory instances and logic cells specifically designed to enable SoC designers to optimize their CPU, GPU, and DSP cores for maximum speed, smallest area, lowest power or optimum balance of all three.
Synopsys IO Libraries support multiple voltages and offer a full set of support cells (supply, corner spacers, diode breakers, and terminators).
The Synopsys Duet Packages of Embedded Memories and Logic Libraries include standard cells, SRAMs, register files, ROMs, HPC Design Kits, Power Optimization Kits (POKs), and optional overdrive/low voltage PVTs, specialty memories, and memory built-in self-test (BIST) and repair that enable designers to achieve the maximum performance with the lowest possible power consumption for their specific application.
Synopsys also provides a comprehensive family of zero mask adder multi-time programmable (MTP), few-time programmable (FTP), and one-time programmable (OTP) NVM IP in standard CMOS process technologies.
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