Cloud native EDA tools & pre-optimized hardware platforms
Monday, October 9, 2023
6:30 p.m. - 10:00 p.m.
The Westin Anaheim Resort, Anaheim, CA
All members of the design and test community are invited to register to attend Synopsys 29th Annual Test & SLM Special Interest Group (SIG) at the 2023 International Test Conference (ITC).
The event will host experts from leading companies including Kioxia, SARC, MediaTek and others who will describe how Synopsys Test and SLM solutions including Test-AI, distributed ATPG, high-speed test fabric, and automotive test are enabling them to achieve their quality and TTM goals.
Attendees will also have the opportunity to meet with Synopsys experts to discuss and learn more about Test and SLM technologies. Appetizers and cocktails will be served, followed by a sit-down dinner and prize drawings!
6:30 p.m. - 7:15 p.m.
7:15 p.m. - 7:20 p.m.
7:20 p.m. - 7:30 p.m.
7:30 p.m. - 9:00 p.m.
9:00 p.m. - 10:00 p.m.
Cocktail Reception
Welcome
Yervant Zorian, Synopsys Fellow at Synopsys
Opening Remarks and Presentation
Dr. Debendra Das Sharma, Intel Senior Fellow at Intel Corporation, Chair Universal Chiplet Interconnect Express (UCIe) Consortium
Presentations:
Achieving Dramatic Reduction in Turn-around Time and Test Cost with Highly Distributed ATPG and TSO.ai
Shohei Morishima, Specialist at Kioxia
Methodology for Manufacturing and In-system Test on Mobile and Automotive GPUs with Streaming Fabric, SEQ/XLBIST and IEEE1687
Rajkumar Pampana, Principal Engineer at Samsung SARC
Implementation of Streaming Fabric and Sequential Compression Technology on Smartphone SOC with High-speed USB Interface
Prashant Balakrishnan, Director at MediaTek
And more!
Raffle Drawing and Dessert
Sunday, October 8 - Friday, October 13, 2023
Disneyland Hotel, Anaheim, CA
Tuesday, October 10
10:30 a.m. - 5:30 p.m.
Wednesday, October 11
9:30 a.m. - 4:30 p.m.
Thursday, October 12
9:30 a.m. - 1:00 p.m.
Tuesday, October 10 | 4:00 – 6:00 p.m. | Magic Kingdom Ball 3
Session C2: Presentations of Platinum Supporters
Pioneering AI Solutions for Test & Silicon Lifecycle Management (SLM)
Synopsys Presenter: Matt Knowles
The Synopsys TestMAX™ family offers innovative test and diagnosis for all silicon designs and enables a unified flow within the Synopsys’ Digital Design Family. Synopsys TestMAX works in conjunction with the latest Synopsys Silicon Lifecyle Management (SLM) technology for enhanced in-chip observability, silicon health and analytics, meeting both design and test goals concurrently.
This year we will be highlighting industry first Test and SLM technologies that encompass integrated tools, IP and methodologies which enable optimized quality, performance and reliability at each phase of the device lifecycle from in-design, in-ramp, in-production and in-field.
See demonstrations on:
Whether you want a quick chat to catch up or want to go deep on details, please reach out to us to schedule an on-site meeting.
Wednesday, October 11 | 12:00 - 2:00 p.m. | Exhibit Floor
Structural Tests over HSIO on SLT (ATS 7038)
Advantest Author: Sri Ganta; Synopsys Authors: Ash Patel, Ramsay Allen
Test Robustness and Glitch Detection with TestMAX Advisor
Ericsson Authors: Anurag Jindal, Dhinakaran Varadhan; Synopsys Authors: Raja Koneru, Ramsay Allen
Effective Yield Boost and Cost Saving by Volume Diagnosis using Yield Explorer
MediaTek Authors: Anti P.H. Tseng, Joe Y.J. Chiu, Emma Chou and Kun-Yang Hsu; Synopsys Authors: Thomas C.Y. Liu, Teng-Wei Shao, James Z.J. Lin,
Test Scalability with Sequential Compression Technology
MediaTek Authors: Mark Nathan, Lichao Chen, Tommy Ngo, Minh Chau; Synopsys Authors: Lakshmi Kalingavaram Ramachandra, Bala Tarun Nelapatla
Cell-Aware Failure Analysis: Advanced Cell-Aware Techniques to Identify the FEOL/MOL Layer Systematic Defects in Cutting-Edge Technology
Samsung Foundry Authors: Jaeseok Park, Hyunyeol Lim, Yongseok Son, Dongkwan Han; Synopsys Authors: Jeongsu Park, Yewon Lee, Camelia Hora, Ruifeng Guo
The Importance of Sensor Analytics in Enabling Silicon Lifecycle Management
Synopsys Authors: Mark Laird, Ramsay Allen
Deep Silicon Data and Analytics for Lifelong Safety and Reliability
Synopsys Authors: Dan Alexandrescu, Lorin Kennedy, Ramsay Allen, Jamileh Davoudi, Pawini Mahajan
Holistic Approach to Solving Silent Data Corruption
Synopsys Author: Adam Cron
Advanced Test Point and Wrapping Techniques for Automotive Designs
NXP Authors: Geoff Shofner, Chris Falk; Synopsys Authors: Raja Koneru, Ramsay Allen
Physical Connection Aware SMS BIST Implementation for Abutted Design
Synopsys Authors: Doo Kim, Mohammed Mosin Junjawadkar, Dooyoung Kim, Manish Arora
New TestMAX XLBIST Parallel Interface
ST Author: Marco Casarsa; Synopsys Author: Alfredo Conte
Advantest Author: Ken Butler; Synopsys Author: Guy Cortez
Tuesday, October 10 | 2:00 – 2:30 p.m. | Magic Kingdom Ball 1
Session A1: Industrial Practices (Long Papers)
A Case Study on IEEE 1838 Compliant Multi-Die 3DIC DFT Implementation
TSMC Presenter: Anshuman Chandra; TSMC Authors: Anshuman Chandra, Moiz Khan, Sandeep Kumar Goel, Ankita Patidar, Fumiaki Takashima; Synopsys Authors: Manish Arora, Bharath Shankaranarayanan, Vistrita Tyagi, Vuong Nguyen
Tuesday, October 10 | 1:30 – 3:00 p.m. | Magic Kingdom Ball 4
Session D1: Modern Memory Trends (Special Session)
Synopsys Commentary: Gurgen Harutyunyan
Talk 1: “Test Challenges for GAA in the Race Between Nanometers and Angstroms”
Synopsys Authors: Karen Amirkhanyan, Hayk Danoyan, Artur Ghukasyan, Gurgen Harutyunyan, Knarik Kyuregyan, Grigor Tshagharyan
Talk 3: “Utilizing Clever ECC Analytics to Improve Memory Lifecycle Management”
AMD Author: Costas Argyrides; Synopsys Authors: Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian
Session C2: Presentations of Platinum Supporters
Pioneering AI Solutions for Test & Silicon Lifecycle Management (SLM)
Synopsys Presenter: Matt Knowles
Tuesday, October 10 | 4:00 – 6:00 p.m. | Magic Kingdom Ball 4
Session D2: HIR & UCIe (Special Session)
Synopsys Commentary: Yervant Zorian
Thursday, October 12 | 10:30 – 12:00 p.m. | Magic Kingdom Ball 4
Session D5: SLM – In-Field Testing
Synopsys Commentary: Yervant Zorian
Technical Session 1 – Automotive Chip Reliability and Resilience
Path Margin Monitor for Silicon Lifecycle
Synopsys Authors: Kranthi Kandula, Ramalingam Kolisetti
Technical Session 3 – Analog Testing Solutions for Automotive Chips
Analog/Mixed-signal Fault Analysis using Custom Fault Approach
Synopsys Authors: Leela Krishna Thota, Varun Reddy, Sreenivasa Rao Vuttaravilli
Thursday, October 12 | 5:15 – 6:30 p.m.
Panel Discussion - Silent Data Corruption: Requirements and
Mitigation | Moderator: Mehdi Tahoori (KIT)
Harish Dixit (Meta), Sankaranarayanan Gurumurthy (AMD), Yervant Zorian (Synopsys), Dimitris Gizopoulos (University of Athens), Adit Singh (Auburn U)
Friday, October 13, 2023 | 8: 30 -10:00 a.m.
Technical Session - Utilizing ECC Analytics to Improve
Memory Lifecycle Management
Costas Argyrides (AMD, USA), Grigor Tshagharyan (Synopsys, Armenia), Gurgen Harutyunyan (Synopsys, Armenia), Yervant Zorian (Synopsys, USA)
Friday, October 13| 10:30am – 12:00 p.m.
Panel Discussion - Ushering in the Dependability Era with IEEE P2851 | Moderator: Fred Gruner (Nvidia)
Jyotika Athavale (Synopsys), Chen, Wei-Ren (New Taipei City),Viswanathan Pillai (TI), Nir Maor (Qualcomm) Meirav Nitzan (Qualcomm)
For more information about Synopsys’ comprehensive test solution, please visit: synopsys.com/test