2023-11-22 08:55:15
The DSP-enhanced Synopsys ARC® EMxD and HS4xD Families of embedded 32-bit processors are based on the scalable ARCv2DSP Instruction Set Architecture (ISA). The DSP-enhanced ARC processor families support a broad portfolio of certified audio codecs and post-processing software from a range of popular standards including Dolby, DTS, Microsoft and SRS.
With patented configuration technology, the cores can be easily customized to meet any application requirement from ultra-small task-specific controllers robust application processors. Additionally, the extendible instruction set makes it possible for customers to add instructions and operations to provide additional acceleration and more efficient operation, resulting in highly differentiated designs that cannot be built with standard, off-the-shelf DSPs or CPUs.
These processors are also designed to be tolerant to high memory latencies. Compared to other solutions in the market, the impact of latency on the processor load is negligible, making the ARC processors the best solution for systems like video and graphics IP, where DDR memory is shared with other resources.
See Synopsys' portfolio of ARC codecs that are optimized for ARC processors with DSP capabilities.
DSP-Enhanced ARC EMxD Processors for Audio
The ARC EMxD family, which includes the ARC EM5D processor, ARC EM7D processor, ARC EM9D processor, and EM11D processor, are specifically designed for ultra low-power embedded DSP applications. These processors are based on the enhanced ARCv2DSP ISA, which adds over 150 optimized DSP instructions to the area- and code-efficient real-time ARCv2 RISC ISA. The processors feature a power-efficient unified 32x32 MUL/MAC unit, support for fixed point DSP vector and single instruction multiple data (SIMD) operations. The ARC EM DSP family features a balanced 3-stage Harvard architecture pipeline that provides efficient throughput and the cores offer excellent real-time control and DSP performance.
Synopsys ARC EM5D and EM7D DSP-Enhanced Processors Datasheet
Synopsys ARC EM9D and EM11D DSP-Enhanced Processors Datasheet
ARC DSP-Enhanced HS4xD Processors for Audio
The HS45D and HS47D processors support more than 150 DSP-optimized instructions, delivering a unique combination of high-performance control and high-efficiency digital signal processing. To speed the execution of math functions, the HS4xD cores give designers the option to implement a hardware integer divider, instructions for 64-bit multiply, multiply-accumulate (MAC), vector addition and vector subtraction, and a optional IEEE 754-compliant floating point unit (single- or double-precision or both). The ARC HS4xD processors are compatible with the ultra-low power ARC EMxD processors and have the same instruction set, making it easy to migrate code between the two processor families.
Synopsys ARC HS4x Processors Datasheet
Register for the Synopsys ARC Audio Processor Online Training
Synopsys Processor IP Portfolio Brochure
Highlights
Products
Downloads and Documentation
- Dual 32x16 XMAC component supports up to two 32x16 MAC operations per instructions and supports all the 32x16 & dual 16x16 MAC instructions
- Dual XMAC built in shifters and 80-bit accumulators allow pseudo floating-point operations to be performed which greatly expanded dynamic range
- RAM configuration optimized for efficient area and power
- Improved system efficiency with enhanced ARM® AMBA® AXI™/AHB™ bus bridges
- Synopsys ARC XY Advanced DSP solution delivers the performance of dedicated DSP cores
- Synopsys ARCompact 16-/32-bit Instruction Set Architecture reduces code size by up to 40 percent compared to 32-bit only instruction sets
- Delivered as synthesizable RTL source code (Verilog®) to be fully compatible with industry-standard design methodologies and tool flows
- XY Advanced DSP solution delivers the performance of dedicated DSP cores
- Synopsys ARC MetaWare Development Toolkit, xCAM and nSIM simulators
ARC EM11D Enhanced 32-bit processor core, ARCv2DSP ISA with Cache and XY Memory | STARs |
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ARC EM5D Enhanced 32-bit processor core, ARCv2DSP ISA, for low power embedded DSP applications | STARs |
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ARC EM7D DSP Enhanced 32-bit processor core with caches, ARCv2DSP ISA, for low power embedded DSP ap | STARs |
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ARC EM9D 32-bit DSP Enhanced Processor core based on the ARCv2DSP ISA with CCM and XY Memory | STARs |
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ARC HS47Dx2 dual-core version of dual-issue HS47D ARCv2DSP ISA, with 100+ DSP instructions and I&D cache | STARs |
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ARC HS47Dx4 quad-core version of dual-issue HS47D ARCv2DSP ISA, with 100+ DSP instructions and I&D cache | STARs |
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ARC HS47D 32-bit, dual-issue processor core, ARCv2DSP ISA, with 100+ DSP instructions and I&D cache | STARs |
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Description: |
ARC EM11D Enhanced 32-bit processor core, ARCv2DSP ISA with Cache and XY Memory |
Name: |
dwc_arc_em11d_core |
Version: |
5.70a |
ECCN: |
3E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Application Notes ARC Processors Not Susceptible to Meltdown and Spectre Vulnerabilities ( PDF )
Databooks ARC EM APEX Databook ( HTML )
ARC EM APEX Databook (5.70a) ( PDF )
ARC EM Databook (5.70a) ( PDF | HTML )
ARC Trace Databook (EM 5.70a) ( HTML | PDF )
DSP Library Performance Databook for ARC EM (latest) ( PDF )
Datasheet Synopsys ARC EM9D and EM11D DSP-Enhanced Processors Datasheet ( PDF )
Programming Guides Programmer's Reference Manual for ARC EM Processors (5.70a) ( PDF | HTML )
Programmer's Reference Manual for ARC EM Processors (Public Edition) ( PDF )
User Guides ARC EM Implementation and Integration Guide (5.70a) ( PDF | HTML )
ARCv2 FPGA Synthesis Flow (EM 5.70a) ( PDF | HTML )
Synopsys ASIC Reference Design Flow User's Guide (EM 5.70a) ( PDF | HTML )
White Paper Designing an Efficient DSP Solution: Choosing the Right Processor and Software Development Toolchain ( PDF )
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arc_em_processor |
Product Code: |
B139-0 |
Description: |
ARC EM5D Enhanced 32-bit processor core, ARCv2DSP ISA, for low power embedded DSP applications |
Name: |
dwc_arc_em5d_core |
Version: |
5.70a |
ECCN: |
3E991/NLR |
STARs: |
Open and/or Closed STARs |
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DesignWare Cores |
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Application Notes ARC Processors Not Susceptible to Meltdown and Spectre Vulnerabilities ( PDF )
Databooks ARC EM APEX Databook ( HTML )
ARC EM APEX Databook (5.70a) ( PDF )
ARC EM Databook (5.70a) ( PDF | HTML )
ARC Trace Databook (EM 5.70a) ( HTML | PDF )
DSP Library Performance Databook for ARC EM (latest) ( PDF )
Programming Guides Programmer's Reference Manual for ARC EM Processors (5.70a) ( PDF | HTML )
Programmer's Reference Manual for ARC EM Processors (Public Edition) ( PDF )
User Guides ARC EM Implementation and Integration Guide (5.70a) ( PDF | HTML )
ARCv2 FPGA Synthesis Flow (EM 5.70a) ( PDF | HTML )
Synopsys ASIC Reference Design Flow User's Guide (EM 5.70a) ( PDF | HTML )
White Papers Configurable and Extensible 32-Bit RISC Processors for Next-Generation SSDs ( PDF )
Designing an Efficient DSP Solution: Choosing the Right Processor and Software Development Toolchain ( PDF )
White Paper: Securing the Internet of Things Using Hardware Rooted Processor Security - An Architect's Guide ( PDF )
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arc_em_processor |
Product Code: |
A628-0 |
Description: |
ARC EM7D DSP Enhanced 32-bit processor core with caches, ARCv2DSP ISA, for low power embedded DSP ap |
Name: |
dwc_arc_em7d_core |
Version: |
5.70a |
ECCN: |
3E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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DesignWare Cores |
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Application Notes ARC Processors Not Susceptible to Meltdown and Spectre Vulnerabilities ( PDF )
Databooks ARC EM APEX Databook ( HTML )
ARC EM APEX Databook (5.70a) ( PDF )
ARC EM Databook (5.70a) ( PDF | HTML )
ARC Trace Databook (EM 5.70a) ( HTML | PDF )
DSP Library Performance Databook for ARC EM (latest) ( PDF )
Programming Guides Programmer's Reference Manual for ARC EM Processors (5.70a) ( PDF | HTML )
Programmer's Reference Manual for ARC EM Processors (Public Edition) ( PDF )
User Guides ARC EM Implementation and Integration Guide (5.70a) ( PDF | HTML )
ARCv2 FPGA Synthesis Flow (EM 5.70a) ( PDF | HTML )
Synopsys ASIC Reference Design Flow User's Guide (EM 5.70a) ( PDF | HTML )
White Paper Designing an Efficient DSP Solution: Choosing the Right Processor and Software Development Toolchain ( PDF )
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Download: |
arc_em_processor |
Product Code: |
A629-0 |
Description: |
ARC EM9D 32-bit DSP Enhanced Processor core based on the ARCv2DSP ISA with CCM and XY Memory |
Name: |
dwc_arc_em9d_core |
Version: |
5.70a |
ECCN: |
3E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Application Notes ARC Processors Not Susceptible to Meltdown and Spectre Vulnerabilities ( PDF )
Databooks ARC EM APEX Databook ( HTML )
ARC EM APEX Databook (5.70a) ( PDF )
ARC EM Databook (5.70a) ( PDF | HTML )
ARC Trace Databook (EM 5.70a) ( HTML | PDF )
DSP Library Performance Databook for ARC EM (latest) ( PDF )
Datasheet Synopsys ARC EM9D and EM11D DSP-Enhanced Processors Datasheet ( PDF )
Programming Guides Programmer's Reference Manual for ARC EM Processors (5.70a) ( PDF | HTML )
Programmer's Reference Manual for ARC EM Processors (Public Edition) ( PDF )
User Guides ARC EM Implementation and Integration Guide (5.70a) ( PDF | HTML )
ARCv2 FPGA Synthesis Flow (EM 5.70a) ( PDF | HTML )
Synopsys ASIC Reference Design Flow User's Guide (EM 5.70a) ( PDF | HTML )
White Papers Designing an Efficient DSP Solution: Choosing the Right Processor and Software Development Toolchain ( PDF )
Efficient Low-Cost Implementation of NB-IoT for Smart Applications ( PDF )
Say Welcome to the Machine - Low-Power Machine Learning for Smart IoT Applications ( PDF )
欢迎迈入机器时代 面向智能物联网应用的低功耗机器学习技术 ( PDF )
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arc_em_processor |
Product Code: |
B138-0 |
Description: |
ARC HS47D 32-bit, dual-issue processor core, ARCv2DSP ISA, with 100+ DSP instructions and I&D cache |
Name: |
dwc_arc_hs47d_core |
Version: |
4.10a |
ECCN: |
3E991/NLR |
STARs: |
Open and/or Closed STARs |
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Application Notes ARC HS4x Halt on Reset Behavior ( PDF )
Databooks ARC HS APEX Databook (4.10a) ( PDF )
ARC HS4x Series Databook (4.10a) ( PDF )
ARC Trace Databook (4.10a) ( PDF )
DSP Library Performance Databook for ARC HS (latest) ( PDF )
HAPS Reference Design Flow Databook (4.10a) ( PDF )
Datasheet Synopsys ARC HS4xD Datasheet ( PDF )
Reference Manuals ARCv2 FPGA Synthesis Flow (4.10a) ( PDF )
ARCv2 ISA Programmer's Reference Manual for ARC HS4x Processors (4.10a) ( PDF )
User Guides ARC HS Implementation and Integration Guide (4.10a) ( PDF )
ARC Synopsys ASIC Reference Design Flow User's Guide (4.10a) ( PDF )
White Paper Digital Signal Processing for Frequency-Modulated Continuous Wave RADARs ( PDF )
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arc_hs_processor |
Product Code: |
C250-0 |
Description: |
ARC HS47Dx2 dual-core version of dual-issue HS47D ARCv2DSP ISA, with 100+ DSP instructions and I&D cache |
Name: |
dwc_arc_hs47dx2_core |
Version: |
4.10a |
ECCN: |
3E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
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Application Notes ARC HS4x Halt on Reset Behavior ( PDF )
Databooks ARC HS APEX Databook (4.10a) ( PDF )
ARC HS4x Series Databook (4.10a) ( PDF )
ARC Trace Databook (4.10a) ( PDF )
DSP Library Performance Databook for ARC HS (latest) ( PDF )
HAPS Reference Design Flow Databook (4.10a) ( PDF )
Datasheet Synopsys ARC HS4xD Datasheet ( PDF )
Reference Manuals ARCv2 FPGA Synthesis Flow (4.10a) ( PDF )
ARCv2 ISA Programmer's Reference Manual for ARC HS4x Processors (4.10a) ( PDF )
User Guides ARC HS Implementation and Integration Guide (4.10a) ( PDF )
ARC Synopsys ASIC Reference Design Flow User's Guide (4.10a) ( PDF )
White Paper Digital Signal Processing for Frequency-Modulated Continuous Wave RADARs ( PDF )
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Download: |
arc_hs_processor |
Product Code: |
C251-0 |
Description: |
ARC HS47Dx4 quad-core version of dual-issue HS47D ARCv2DSP ISA, with 100+ DSP instructions and I&D cache |
Name: |
dwc_arc_hs47dx4_core |
Version: |
4.10a |
ECCN: |
3E991/NLR |
STARs: |
Open and/or Closed STARs |
myDesignWare: |
Subscribe for Notifications |
Product Type: |
DesignWare Cores |
Documentation: |
Hide Documents...
Application Notes ARC HS4x Halt on Reset Behavior ( PDF )
Databooks ARC HS APEX Databook (4.10a) ( PDF )
ARC HS4x Series Databook (4.10a) ( PDF )
ARC Trace Databook (4.10a) ( PDF )
DSP Library Performance Databook for ARC HS (latest) ( PDF )
HAPS Reference Design Flow Databook (4.10a) ( PDF )
Datasheet Synopsys ARC HS4xD Datasheet ( PDF )
Reference Manuals ARCv2 FPGA Synthesis Flow (4.10a) ( PDF )
ARCv2 ISA Programmer's Reference Manual for ARC HS4x Processors (4.10a) ( PDF )
User Guides ARC HS Implementation and Integration Guide (4.10a) ( PDF )
ARC Synopsys ASIC Reference Design Flow User's Guide (4.10a) ( PDF )
White Paper Digital Signal Processing for Frequency-Modulated Continuous Wave RADARs ( PDF )
|
Download: |
arc_hs_processor |
Product Code: |
C252-0 |