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Bluespec & Synopsys
Accelerating Verification and Validation for RISC-V Cores
Drive Innovation and Cost Reduction with RISC-V Processors
Bluespec provides tools and IP to safely and efficiently leverage RISC-V’s unprecedented freedom to innovate. As the first-ever multi-sourced commercial-grade ISA, SoC developers need a common RISC-V platform to explore, evaluate, compare, integrate and validate RISC-V subsystems built from a large universe of proprietary and open RISC-V cores. Bluespec integrates deep RISC-V expertise with best-in-class Synopsys EDA tools to provide a powerful out-of-the-box RISC-V development experience that can be easily extended to host any RISC-V core.
Universal Verification Methodology Coverage for Bluespec RISC-V Cores Whitepaper
This whitepaper explains the basics of UVM functional coverage for RISC-V cores using the Google RISCV-DV open-source project, Synopsys verification solutions, and RISC-V processor cores from Bluespec.
Key Benefits
Interoperable
Design, verification, and software development flows verified with Synopsys tools for faster ramp-up
Open & Extendable
Development platform supporting evolving RISC-V features, RISC-V cores, subsystems, and software ecosystem components
Vendor Independent
Tools support any RISC-V design and offer seamless interoperability between FPGA vendors and ASIC technologies
RISC-V Verification
Synopsys VCS® functional verification and Verdi® Debug System solutions are Universal Verification Methodology (UVM) compliant, and seamlessly integrate with Bluespec RISC-V verification flows. The Synopsys' Verification Reference Methodology (VRM) Cookbook for Bluespec RISC-V Processors features Bluespec's RV32I.MCU.AXI4.DM processor, and includes the recommended verification methodology for Bluespecs entire RISC-V processor portfolio.
RISC-V Exploration
Optimized and pre-verified full solution stacks for RTOS and Linux RISC-V subsystems are some of the results of Bluespec's collaboration with Synopsys. These stacks provide the hardware and software necessary to evaluate and compare RISC-V cores in bare-metal and virtual memory systems running in the Synopsys VCS® simulator, the Verdi debug platform, and Synplify® synthesis tool. Users can choose system components to evaluate the stacks for specific applications.
RISC-V Development
A comprehensive RISC-V software development environment that runs on fast, hardware-emulated RISC-V subsystems in an FPGA-enabled cloud. Any RISC-V subsystem evaluated in the Synopsys environment can be seamlessly accessed in the FPGA cloud for high-speed hardware-accurate validation of software applications
Testimonials
News & Resources
Webinar
Efficient Bluespec RISC-V Processor Verification for Highest Coverage Closure: Case Study
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White Paper
Cookbook
Glossary